Source file src/cmd/internal/obj/arm64/sysRegEnc.go

     1  // Code generated by arm64gen -i ./files -o sysRegEnc.go. DO NOT EDIT.
     2  
     3  package arm64
     4  
     5  const (
     6  	SYSREG_BEGIN = REG_SPECIAL + iota
     7  	REG_ACTLR_EL1
     8  	REG_AFSR0_EL1
     9  	REG_AFSR1_EL1
    10  	REG_AIDR_EL1
    11  	REG_AMAIR_EL1
    12  	REG_AMCFGR_EL0
    13  	REG_AMCGCR_EL0
    14  	REG_AMCNTENCLR0_EL0
    15  	REG_AMCNTENCLR1_EL0
    16  	REG_AMCNTENSET0_EL0
    17  	REG_AMCNTENSET1_EL0
    18  	REG_AMCR_EL0
    19  	REG_AMEVCNTR00_EL0
    20  	REG_AMEVCNTR01_EL0
    21  	REG_AMEVCNTR02_EL0
    22  	REG_AMEVCNTR03_EL0
    23  	REG_AMEVCNTR04_EL0
    24  	REG_AMEVCNTR05_EL0
    25  	REG_AMEVCNTR06_EL0
    26  	REG_AMEVCNTR07_EL0
    27  	REG_AMEVCNTR08_EL0
    28  	REG_AMEVCNTR09_EL0
    29  	REG_AMEVCNTR010_EL0
    30  	REG_AMEVCNTR011_EL0
    31  	REG_AMEVCNTR012_EL0
    32  	REG_AMEVCNTR013_EL0
    33  	REG_AMEVCNTR014_EL0
    34  	REG_AMEVCNTR015_EL0
    35  	REG_AMEVCNTR10_EL0
    36  	REG_AMEVCNTR11_EL0
    37  	REG_AMEVCNTR12_EL0
    38  	REG_AMEVCNTR13_EL0
    39  	REG_AMEVCNTR14_EL0
    40  	REG_AMEVCNTR15_EL0
    41  	REG_AMEVCNTR16_EL0
    42  	REG_AMEVCNTR17_EL0
    43  	REG_AMEVCNTR18_EL0
    44  	REG_AMEVCNTR19_EL0
    45  	REG_AMEVCNTR110_EL0
    46  	REG_AMEVCNTR111_EL0
    47  	REG_AMEVCNTR112_EL0
    48  	REG_AMEVCNTR113_EL0
    49  	REG_AMEVCNTR114_EL0
    50  	REG_AMEVCNTR115_EL0
    51  	REG_AMEVTYPER00_EL0
    52  	REG_AMEVTYPER01_EL0
    53  	REG_AMEVTYPER02_EL0
    54  	REG_AMEVTYPER03_EL0
    55  	REG_AMEVTYPER04_EL0
    56  	REG_AMEVTYPER05_EL0
    57  	REG_AMEVTYPER06_EL0
    58  	REG_AMEVTYPER07_EL0
    59  	REG_AMEVTYPER08_EL0
    60  	REG_AMEVTYPER09_EL0
    61  	REG_AMEVTYPER010_EL0
    62  	REG_AMEVTYPER011_EL0
    63  	REG_AMEVTYPER012_EL0
    64  	REG_AMEVTYPER013_EL0
    65  	REG_AMEVTYPER014_EL0
    66  	REG_AMEVTYPER015_EL0
    67  	REG_AMEVTYPER10_EL0
    68  	REG_AMEVTYPER11_EL0
    69  	REG_AMEVTYPER12_EL0
    70  	REG_AMEVTYPER13_EL0
    71  	REG_AMEVTYPER14_EL0
    72  	REG_AMEVTYPER15_EL0
    73  	REG_AMEVTYPER16_EL0
    74  	REG_AMEVTYPER17_EL0
    75  	REG_AMEVTYPER18_EL0
    76  	REG_AMEVTYPER19_EL0
    77  	REG_AMEVTYPER110_EL0
    78  	REG_AMEVTYPER111_EL0
    79  	REG_AMEVTYPER112_EL0
    80  	REG_AMEVTYPER113_EL0
    81  	REG_AMEVTYPER114_EL0
    82  	REG_AMEVTYPER115_EL0
    83  	REG_AMUSERENR_EL0
    84  	REG_APDAKeyHi_EL1
    85  	REG_APDAKeyLo_EL1
    86  	REG_APDBKeyHi_EL1
    87  	REG_APDBKeyLo_EL1
    88  	REG_APGAKeyHi_EL1
    89  	REG_APGAKeyLo_EL1
    90  	REG_APIAKeyHi_EL1
    91  	REG_APIAKeyLo_EL1
    92  	REG_APIBKeyHi_EL1
    93  	REG_APIBKeyLo_EL1
    94  	REG_CCSIDR2_EL1
    95  	REG_CCSIDR_EL1
    96  	REG_CLIDR_EL1
    97  	REG_CNTFRQ_EL0
    98  	REG_CNTKCTL_EL1
    99  	REG_CNTP_CTL_EL0
   100  	REG_CNTP_CVAL_EL0
   101  	REG_CNTP_TVAL_EL0
   102  	REG_CNTPCT_EL0
   103  	REG_CNTPS_CTL_EL1
   104  	REG_CNTPS_CVAL_EL1
   105  	REG_CNTPS_TVAL_EL1
   106  	REG_CNTV_CTL_EL0
   107  	REG_CNTV_CVAL_EL0
   108  	REG_CNTV_TVAL_EL0
   109  	REG_CNTVCT_EL0
   110  	REG_CONTEXTIDR_EL1
   111  	REG_CPACR_EL1
   112  	REG_CSSELR_EL1
   113  	REG_CTR_EL0
   114  	REG_CurrentEL
   115  	REG_DAIF
   116  	REG_DBGAUTHSTATUS_EL1
   117  	REG_DBGBCR0_EL1
   118  	REG_DBGBCR1_EL1
   119  	REG_DBGBCR2_EL1
   120  	REG_DBGBCR3_EL1
   121  	REG_DBGBCR4_EL1
   122  	REG_DBGBCR5_EL1
   123  	REG_DBGBCR6_EL1
   124  	REG_DBGBCR7_EL1
   125  	REG_DBGBCR8_EL1
   126  	REG_DBGBCR9_EL1
   127  	REG_DBGBCR10_EL1
   128  	REG_DBGBCR11_EL1
   129  	REG_DBGBCR12_EL1
   130  	REG_DBGBCR13_EL1
   131  	REG_DBGBCR14_EL1
   132  	REG_DBGBCR15_EL1
   133  	REG_DBGBVR0_EL1
   134  	REG_DBGBVR1_EL1
   135  	REG_DBGBVR2_EL1
   136  	REG_DBGBVR3_EL1
   137  	REG_DBGBVR4_EL1
   138  	REG_DBGBVR5_EL1
   139  	REG_DBGBVR6_EL1
   140  	REG_DBGBVR7_EL1
   141  	REG_DBGBVR8_EL1
   142  	REG_DBGBVR9_EL1
   143  	REG_DBGBVR10_EL1
   144  	REG_DBGBVR11_EL1
   145  	REG_DBGBVR12_EL1
   146  	REG_DBGBVR13_EL1
   147  	REG_DBGBVR14_EL1
   148  	REG_DBGBVR15_EL1
   149  	REG_DBGCLAIMCLR_EL1
   150  	REG_DBGCLAIMSET_EL1
   151  	REG_DBGDTR_EL0
   152  	REG_DBGDTRRX_EL0
   153  	REG_DBGDTRTX_EL0
   154  	REG_DBGPRCR_EL1
   155  	REG_DBGWCR0_EL1
   156  	REG_DBGWCR1_EL1
   157  	REG_DBGWCR2_EL1
   158  	REG_DBGWCR3_EL1
   159  	REG_DBGWCR4_EL1
   160  	REG_DBGWCR5_EL1
   161  	REG_DBGWCR6_EL1
   162  	REG_DBGWCR7_EL1
   163  	REG_DBGWCR8_EL1
   164  	REG_DBGWCR9_EL1
   165  	REG_DBGWCR10_EL1
   166  	REG_DBGWCR11_EL1
   167  	REG_DBGWCR12_EL1
   168  	REG_DBGWCR13_EL1
   169  	REG_DBGWCR14_EL1
   170  	REG_DBGWCR15_EL1
   171  	REG_DBGWVR0_EL1
   172  	REG_DBGWVR1_EL1
   173  	REG_DBGWVR2_EL1
   174  	REG_DBGWVR3_EL1
   175  	REG_DBGWVR4_EL1
   176  	REG_DBGWVR5_EL1
   177  	REG_DBGWVR6_EL1
   178  	REG_DBGWVR7_EL1
   179  	REG_DBGWVR8_EL1
   180  	REG_DBGWVR9_EL1
   181  	REG_DBGWVR10_EL1
   182  	REG_DBGWVR11_EL1
   183  	REG_DBGWVR12_EL1
   184  	REG_DBGWVR13_EL1
   185  	REG_DBGWVR14_EL1
   186  	REG_DBGWVR15_EL1
   187  	REG_DCZID_EL0
   188  	REG_DISR_EL1
   189  	REG_DIT
   190  	REG_DLR_EL0
   191  	REG_DSPSR_EL0
   192  	REG_ELR_EL1
   193  	REG_ERRIDR_EL1
   194  	REG_ERRSELR_EL1
   195  	REG_ERXADDR_EL1
   196  	REG_ERXCTLR_EL1
   197  	REG_ERXFR_EL1
   198  	REG_ERXMISC0_EL1
   199  	REG_ERXMISC1_EL1
   200  	REG_ERXMISC2_EL1
   201  	REG_ERXMISC3_EL1
   202  	REG_ERXPFGCDN_EL1
   203  	REG_ERXPFGCTL_EL1
   204  	REG_ERXPFGF_EL1
   205  	REG_ERXSTATUS_EL1
   206  	REG_ESR_EL1
   207  	REG_FAR_EL1
   208  	REG_FPCR
   209  	REG_FPSR
   210  	REG_GCR_EL1
   211  	REG_GMID_EL1
   212  	REG_ICC_AP0R0_EL1
   213  	REG_ICC_AP0R1_EL1
   214  	REG_ICC_AP0R2_EL1
   215  	REG_ICC_AP0R3_EL1
   216  	REG_ICC_AP1R0_EL1
   217  	REG_ICC_AP1R1_EL1
   218  	REG_ICC_AP1R2_EL1
   219  	REG_ICC_AP1R3_EL1
   220  	REG_ICC_ASGI1R_EL1
   221  	REG_ICC_BPR0_EL1
   222  	REG_ICC_BPR1_EL1
   223  	REG_ICC_CTLR_EL1
   224  	REG_ICC_DIR_EL1
   225  	REG_ICC_EOIR0_EL1
   226  	REG_ICC_EOIR1_EL1
   227  	REG_ICC_HPPIR0_EL1
   228  	REG_ICC_HPPIR1_EL1
   229  	REG_ICC_IAR0_EL1
   230  	REG_ICC_IAR1_EL1
   231  	REG_ICC_IGRPEN0_EL1
   232  	REG_ICC_IGRPEN1_EL1
   233  	REG_ICC_PMR_EL1
   234  	REG_ICC_RPR_EL1
   235  	REG_ICC_SGI0R_EL1
   236  	REG_ICC_SGI1R_EL1
   237  	REG_ICC_SRE_EL1
   238  	REG_ICV_AP0R0_EL1
   239  	REG_ICV_AP0R1_EL1
   240  	REG_ICV_AP0R2_EL1
   241  	REG_ICV_AP0R3_EL1
   242  	REG_ICV_AP1R0_EL1
   243  	REG_ICV_AP1R1_EL1
   244  	REG_ICV_AP1R2_EL1
   245  	REG_ICV_AP1R3_EL1
   246  	REG_ICV_BPR0_EL1
   247  	REG_ICV_BPR1_EL1
   248  	REG_ICV_CTLR_EL1
   249  	REG_ICV_DIR_EL1
   250  	REG_ICV_EOIR0_EL1
   251  	REG_ICV_EOIR1_EL1
   252  	REG_ICV_HPPIR0_EL1
   253  	REG_ICV_HPPIR1_EL1
   254  	REG_ICV_IAR0_EL1
   255  	REG_ICV_IAR1_EL1
   256  	REG_ICV_IGRPEN0_EL1
   257  	REG_ICV_IGRPEN1_EL1
   258  	REG_ICV_PMR_EL1
   259  	REG_ICV_RPR_EL1
   260  	REG_ID_AA64AFR0_EL1
   261  	REG_ID_AA64AFR1_EL1
   262  	REG_ID_AA64DFR0_EL1
   263  	REG_ID_AA64DFR1_EL1
   264  	REG_ID_AA64ISAR0_EL1
   265  	REG_ID_AA64ISAR1_EL1
   266  	REG_ID_AA64MMFR0_EL1
   267  	REG_ID_AA64MMFR1_EL1
   268  	REG_ID_AA64MMFR2_EL1
   269  	REG_ID_AA64PFR0_EL1
   270  	REG_ID_AA64PFR1_EL1
   271  	REG_ID_AA64ZFR0_EL1
   272  	REG_ID_AFR0_EL1
   273  	REG_ID_DFR0_EL1
   274  	REG_ID_ISAR0_EL1
   275  	REG_ID_ISAR1_EL1
   276  	REG_ID_ISAR2_EL1
   277  	REG_ID_ISAR3_EL1
   278  	REG_ID_ISAR4_EL1
   279  	REG_ID_ISAR5_EL1
   280  	REG_ID_ISAR6_EL1
   281  	REG_ID_MMFR0_EL1
   282  	REG_ID_MMFR1_EL1
   283  	REG_ID_MMFR2_EL1
   284  	REG_ID_MMFR3_EL1
   285  	REG_ID_MMFR4_EL1
   286  	REG_ID_PFR0_EL1
   287  	REG_ID_PFR1_EL1
   288  	REG_ID_PFR2_EL1
   289  	REG_ISR_EL1
   290  	REG_LORC_EL1
   291  	REG_LOREA_EL1
   292  	REG_LORID_EL1
   293  	REG_LORN_EL1
   294  	REG_LORSA_EL1
   295  	REG_MAIR_EL1
   296  	REG_MDCCINT_EL1
   297  	REG_MDCCSR_EL0
   298  	REG_MDRAR_EL1
   299  	REG_MDSCR_EL1
   300  	REG_MIDR_EL1
   301  	REG_MPAM0_EL1
   302  	REG_MPAM1_EL1
   303  	REG_MPAMIDR_EL1
   304  	REG_MPIDR_EL1
   305  	REG_MVFR0_EL1
   306  	REG_MVFR1_EL1
   307  	REG_MVFR2_EL1
   308  	REG_NZCV
   309  	REG_OSDLR_EL1
   310  	REG_OSDTRRX_EL1
   311  	REG_OSDTRTX_EL1
   312  	REG_OSECCR_EL1
   313  	REG_OSLAR_EL1
   314  	REG_OSLSR_EL1
   315  	REG_PAN
   316  	REG_PAR_EL1
   317  	REG_PMBIDR_EL1
   318  	REG_PMBLIMITR_EL1
   319  	REG_PMBPTR_EL1
   320  	REG_PMBSR_EL1
   321  	REG_PMCCFILTR_EL0
   322  	REG_PMCCNTR_EL0
   323  	REG_PMCEID0_EL0
   324  	REG_PMCEID1_EL0
   325  	REG_PMCNTENCLR_EL0
   326  	REG_PMCNTENSET_EL0
   327  	REG_PMCR_EL0
   328  	REG_PMEVCNTR0_EL0
   329  	REG_PMEVCNTR1_EL0
   330  	REG_PMEVCNTR2_EL0
   331  	REG_PMEVCNTR3_EL0
   332  	REG_PMEVCNTR4_EL0
   333  	REG_PMEVCNTR5_EL0
   334  	REG_PMEVCNTR6_EL0
   335  	REG_PMEVCNTR7_EL0
   336  	REG_PMEVCNTR8_EL0
   337  	REG_PMEVCNTR9_EL0
   338  	REG_PMEVCNTR10_EL0
   339  	REG_PMEVCNTR11_EL0
   340  	REG_PMEVCNTR12_EL0
   341  	REG_PMEVCNTR13_EL0
   342  	REG_PMEVCNTR14_EL0
   343  	REG_PMEVCNTR15_EL0
   344  	REG_PMEVCNTR16_EL0
   345  	REG_PMEVCNTR17_EL0
   346  	REG_PMEVCNTR18_EL0
   347  	REG_PMEVCNTR19_EL0
   348  	REG_PMEVCNTR20_EL0
   349  	REG_PMEVCNTR21_EL0
   350  	REG_PMEVCNTR22_EL0
   351  	REG_PMEVCNTR23_EL0
   352  	REG_PMEVCNTR24_EL0
   353  	REG_PMEVCNTR25_EL0
   354  	REG_PMEVCNTR26_EL0
   355  	REG_PMEVCNTR27_EL0
   356  	REG_PMEVCNTR28_EL0
   357  	REG_PMEVCNTR29_EL0
   358  	REG_PMEVCNTR30_EL0
   359  	REG_PMEVTYPER0_EL0
   360  	REG_PMEVTYPER1_EL0
   361  	REG_PMEVTYPER2_EL0
   362  	REG_PMEVTYPER3_EL0
   363  	REG_PMEVTYPER4_EL0
   364  	REG_PMEVTYPER5_EL0
   365  	REG_PMEVTYPER6_EL0
   366  	REG_PMEVTYPER7_EL0
   367  	REG_PMEVTYPER8_EL0
   368  	REG_PMEVTYPER9_EL0
   369  	REG_PMEVTYPER10_EL0
   370  	REG_PMEVTYPER11_EL0
   371  	REG_PMEVTYPER12_EL0
   372  	REG_PMEVTYPER13_EL0
   373  	REG_PMEVTYPER14_EL0
   374  	REG_PMEVTYPER15_EL0
   375  	REG_PMEVTYPER16_EL0
   376  	REG_PMEVTYPER17_EL0
   377  	REG_PMEVTYPER18_EL0
   378  	REG_PMEVTYPER19_EL0
   379  	REG_PMEVTYPER20_EL0
   380  	REG_PMEVTYPER21_EL0
   381  	REG_PMEVTYPER22_EL0
   382  	REG_PMEVTYPER23_EL0
   383  	REG_PMEVTYPER24_EL0
   384  	REG_PMEVTYPER25_EL0
   385  	REG_PMEVTYPER26_EL0
   386  	REG_PMEVTYPER27_EL0
   387  	REG_PMEVTYPER28_EL0
   388  	REG_PMEVTYPER29_EL0
   389  	REG_PMEVTYPER30_EL0
   390  	REG_PMINTENCLR_EL1
   391  	REG_PMINTENSET_EL1
   392  	REG_PMMIR_EL1
   393  	REG_PMOVSCLR_EL0
   394  	REG_PMOVSSET_EL0
   395  	REG_PMSCR_EL1
   396  	REG_PMSELR_EL0
   397  	REG_PMSEVFR_EL1
   398  	REG_PMSFCR_EL1
   399  	REG_PMSICR_EL1
   400  	REG_PMSIDR_EL1
   401  	REG_PMSIRR_EL1
   402  	REG_PMSLATFR_EL1
   403  	REG_PMSWINC_EL0
   404  	REG_PMUSERENR_EL0
   405  	REG_PMXEVCNTR_EL0
   406  	REG_PMXEVTYPER_EL0
   407  	REG_REVIDR_EL1
   408  	REG_RGSR_EL1
   409  	REG_RMR_EL1
   410  	REG_RNDR
   411  	REG_RNDRRS
   412  	REG_RVBAR_EL1
   413  	REG_SCTLR_EL1
   414  	REG_SCXTNUM_EL0
   415  	REG_SCXTNUM_EL1
   416  	REG_SP_EL0
   417  	REG_SP_EL1
   418  	REG_SPSel
   419  	REG_SPSR_abt
   420  	REG_SPSR_EL1
   421  	REG_SPSR_fiq
   422  	REG_SPSR_irq
   423  	REG_SPSR_und
   424  	REG_SSBS
   425  	REG_TCO
   426  	REG_TCR_EL1
   427  	REG_TFSR_EL1
   428  	REG_TFSRE0_EL1
   429  	REG_TPIDR_EL0
   430  	REG_TPIDR_EL1
   431  	REG_TPIDRRO_EL0
   432  	REG_TRFCR_EL1
   433  	REG_TTBR0_EL1
   434  	REG_TTBR1_EL1
   435  	REG_UAO
   436  	REG_VBAR_EL1
   437  	REG_ZCR_EL1
   438  	SYSREG_END
   439  )
   440  
   441  const (
   442  	SR_READ = 1 << iota
   443  	SR_WRITE
   444  )
   445  
   446  var SystemReg = []struct {
   447  	Name string
   448  	Reg  int16
   449  	Enc  uint32
   450  	// AccessFlags is the readable and writeable property of system register.
   451  	AccessFlags uint8
   452  }{
   453  	{"ACTLR_EL1", REG_ACTLR_EL1, 0x181020, SR_READ | SR_WRITE},
   454  	{"AFSR0_EL1", REG_AFSR0_EL1, 0x185100, SR_READ | SR_WRITE},
   455  	{"AFSR1_EL1", REG_AFSR1_EL1, 0x185120, SR_READ | SR_WRITE},
   456  	{"AIDR_EL1", REG_AIDR_EL1, 0x1900e0, SR_READ},
   457  	{"AMAIR_EL1", REG_AMAIR_EL1, 0x18a300, SR_READ | SR_WRITE},
   458  	{"AMCFGR_EL0", REG_AMCFGR_EL0, 0x1bd220, SR_READ},
   459  	{"AMCGCR_EL0", REG_AMCGCR_EL0, 0x1bd240, SR_READ},
   460  	{"AMCNTENCLR0_EL0", REG_AMCNTENCLR0_EL0, 0x1bd280, SR_READ | SR_WRITE},
   461  	{"AMCNTENCLR1_EL0", REG_AMCNTENCLR1_EL0, 0x1bd300, SR_READ | SR_WRITE},
   462  	{"AMCNTENSET0_EL0", REG_AMCNTENSET0_EL0, 0x1bd2a0, SR_READ | SR_WRITE},
   463  	{"AMCNTENSET1_EL0", REG_AMCNTENSET1_EL0, 0x1bd320, SR_READ | SR_WRITE},
   464  	{"AMCR_EL0", REG_AMCR_EL0, 0x1bd200, SR_READ | SR_WRITE},
   465  	{"AMEVCNTR00_EL0", REG_AMEVCNTR00_EL0, 0x1bd400, SR_READ | SR_WRITE},
   466  	{"AMEVCNTR01_EL0", REG_AMEVCNTR01_EL0, 0x1bd420, SR_READ | SR_WRITE},
   467  	{"AMEVCNTR02_EL0", REG_AMEVCNTR02_EL0, 0x1bd440, SR_READ | SR_WRITE},
   468  	{"AMEVCNTR03_EL0", REG_AMEVCNTR03_EL0, 0x1bd460, SR_READ | SR_WRITE},
   469  	{"AMEVCNTR04_EL0", REG_AMEVCNTR04_EL0, 0x1bd480, SR_READ | SR_WRITE},
   470  	{"AMEVCNTR05_EL0", REG_AMEVCNTR05_EL0, 0x1bd4a0, SR_READ | SR_WRITE},
   471  	{"AMEVCNTR06_EL0", REG_AMEVCNTR06_EL0, 0x1bd4c0, SR_READ | SR_WRITE},
   472  	{"AMEVCNTR07_EL0", REG_AMEVCNTR07_EL0, 0x1bd4e0, SR_READ | SR_WRITE},
   473  	{"AMEVCNTR08_EL0", REG_AMEVCNTR08_EL0, 0x1bd500, SR_READ | SR_WRITE},
   474  	{"AMEVCNTR09_EL0", REG_AMEVCNTR09_EL0, 0x1bd520, SR_READ | SR_WRITE},
   475  	{"AMEVCNTR010_EL0", REG_AMEVCNTR010_EL0, 0x1bd540, SR_READ | SR_WRITE},
   476  	{"AMEVCNTR011_EL0", REG_AMEVCNTR011_EL0, 0x1bd560, SR_READ | SR_WRITE},
   477  	{"AMEVCNTR012_EL0", REG_AMEVCNTR012_EL0, 0x1bd580, SR_READ | SR_WRITE},
   478  	{"AMEVCNTR013_EL0", REG_AMEVCNTR013_EL0, 0x1bd5a0, SR_READ | SR_WRITE},
   479  	{"AMEVCNTR014_EL0", REG_AMEVCNTR014_EL0, 0x1bd5c0, SR_READ | SR_WRITE},
   480  	{"AMEVCNTR015_EL0", REG_AMEVCNTR015_EL0, 0x1bd5e0, SR_READ | SR_WRITE},
   481  	{"AMEVCNTR10_EL0", REG_AMEVCNTR10_EL0, 0x1bdc00, SR_READ | SR_WRITE},
   482  	{"AMEVCNTR11_EL0", REG_AMEVCNTR11_EL0, 0x1bdc20, SR_READ | SR_WRITE},
   483  	{"AMEVCNTR12_EL0", REG_AMEVCNTR12_EL0, 0x1bdc40, SR_READ | SR_WRITE},
   484  	{"AMEVCNTR13_EL0", REG_AMEVCNTR13_EL0, 0x1bdc60, SR_READ | SR_WRITE},
   485  	{"AMEVCNTR14_EL0", REG_AMEVCNTR14_EL0, 0x1bdc80, SR_READ | SR_WRITE},
   486  	{"AMEVCNTR15_EL0", REG_AMEVCNTR15_EL0, 0x1bdca0, SR_READ | SR_WRITE},
   487  	{"AMEVCNTR16_EL0", REG_AMEVCNTR16_EL0, 0x1bdcc0, SR_READ | SR_WRITE},
   488  	{"AMEVCNTR17_EL0", REG_AMEVCNTR17_EL0, 0x1bdce0, SR_READ | SR_WRITE},
   489  	{"AMEVCNTR18_EL0", REG_AMEVCNTR18_EL0, 0x1bdd00, SR_READ | SR_WRITE},
   490  	{"AMEVCNTR19_EL0", REG_AMEVCNTR19_EL0, 0x1bdd20, SR_READ | SR_WRITE},
   491  	{"AMEVCNTR110_EL0", REG_AMEVCNTR110_EL0, 0x1bdd40, SR_READ | SR_WRITE},
   492  	{"AMEVCNTR111_EL0", REG_AMEVCNTR111_EL0, 0x1bdd60, SR_READ | SR_WRITE},
   493  	{"AMEVCNTR112_EL0", REG_AMEVCNTR112_EL0, 0x1bdd80, SR_READ | SR_WRITE},
   494  	{"AMEVCNTR113_EL0", REG_AMEVCNTR113_EL0, 0x1bdda0, SR_READ | SR_WRITE},
   495  	{"AMEVCNTR114_EL0", REG_AMEVCNTR114_EL0, 0x1bddc0, SR_READ | SR_WRITE},
   496  	{"AMEVCNTR115_EL0", REG_AMEVCNTR115_EL0, 0x1bdde0, SR_READ | SR_WRITE},
   497  	{"AMEVTYPER00_EL0", REG_AMEVTYPER00_EL0, 0x1bd600, SR_READ},
   498  	{"AMEVTYPER01_EL0", REG_AMEVTYPER01_EL0, 0x1bd620, SR_READ},
   499  	{"AMEVTYPER02_EL0", REG_AMEVTYPER02_EL0, 0x1bd640, SR_READ},
   500  	{"AMEVTYPER03_EL0", REG_AMEVTYPER03_EL0, 0x1bd660, SR_READ},
   501  	{"AMEVTYPER04_EL0", REG_AMEVTYPER04_EL0, 0x1bd680, SR_READ},
   502  	{"AMEVTYPER05_EL0", REG_AMEVTYPER05_EL0, 0x1bd6a0, SR_READ},
   503  	{"AMEVTYPER06_EL0", REG_AMEVTYPER06_EL0, 0x1bd6c0, SR_READ},
   504  	{"AMEVTYPER07_EL0", REG_AMEVTYPER07_EL0, 0x1bd6e0, SR_READ},
   505  	{"AMEVTYPER08_EL0", REG_AMEVTYPER08_EL0, 0x1bd700, SR_READ},
   506  	{"AMEVTYPER09_EL0", REG_AMEVTYPER09_EL0, 0x1bd720, SR_READ},
   507  	{"AMEVTYPER010_EL0", REG_AMEVTYPER010_EL0, 0x1bd740, SR_READ},
   508  	{"AMEVTYPER011_EL0", REG_AMEVTYPER011_EL0, 0x1bd760, SR_READ},
   509  	{"AMEVTYPER012_EL0", REG_AMEVTYPER012_EL0, 0x1bd780, SR_READ},
   510  	{"AMEVTYPER013_EL0", REG_AMEVTYPER013_EL0, 0x1bd7a0, SR_READ},
   511  	{"AMEVTYPER014_EL0", REG_AMEVTYPER014_EL0, 0x1bd7c0, SR_READ},
   512  	{"AMEVTYPER015_EL0", REG_AMEVTYPER015_EL0, 0x1bd7e0, SR_READ},
   513  	{"AMEVTYPER10_EL0", REG_AMEVTYPER10_EL0, 0x1bde00, SR_READ | SR_WRITE},
   514  	{"AMEVTYPER11_EL0", REG_AMEVTYPER11_EL0, 0x1bde20, SR_READ | SR_WRITE},
   515  	{"AMEVTYPER12_EL0", REG_AMEVTYPER12_EL0, 0x1bde40, SR_READ | SR_WRITE},
   516  	{"AMEVTYPER13_EL0", REG_AMEVTYPER13_EL0, 0x1bde60, SR_READ | SR_WRITE},
   517  	{"AMEVTYPER14_EL0", REG_AMEVTYPER14_EL0, 0x1bde80, SR_READ | SR_WRITE},
   518  	{"AMEVTYPER15_EL0", REG_AMEVTYPER15_EL0, 0x1bdea0, SR_READ | SR_WRITE},
   519  	{"AMEVTYPER16_EL0", REG_AMEVTYPER16_EL0, 0x1bdec0, SR_READ | SR_WRITE},
   520  	{"AMEVTYPER17_EL0", REG_AMEVTYPER17_EL0, 0x1bdee0, SR_READ | SR_WRITE},
   521  	{"AMEVTYPER18_EL0", REG_AMEVTYPER18_EL0, 0x1bdf00, SR_READ | SR_WRITE},
   522  	{"AMEVTYPER19_EL0", REG_AMEVTYPER19_EL0, 0x1bdf20, SR_READ | SR_WRITE},
   523  	{"AMEVTYPER110_EL0", REG_AMEVTYPER110_EL0, 0x1bdf40, SR_READ | SR_WRITE},
   524  	{"AMEVTYPER111_EL0", REG_AMEVTYPER111_EL0, 0x1bdf60, SR_READ | SR_WRITE},
   525  	{"AMEVTYPER112_EL0", REG_AMEVTYPER112_EL0, 0x1bdf80, SR_READ | SR_WRITE},
   526  	{"AMEVTYPER113_EL0", REG_AMEVTYPER113_EL0, 0x1bdfa0, SR_READ | SR_WRITE},
   527  	{"AMEVTYPER114_EL0", REG_AMEVTYPER114_EL0, 0x1bdfc0, SR_READ | SR_WRITE},
   528  	{"AMEVTYPER115_EL0", REG_AMEVTYPER115_EL0, 0x1bdfe0, SR_READ | SR_WRITE},
   529  	{"AMUSERENR_EL0", REG_AMUSERENR_EL0, 0x1bd260, SR_READ | SR_WRITE},
   530  	{"APDAKeyHi_EL1", REG_APDAKeyHi_EL1, 0x182220, SR_READ | SR_WRITE},
   531  	{"APDAKeyLo_EL1", REG_APDAKeyLo_EL1, 0x182200, SR_READ | SR_WRITE},
   532  	{"APDBKeyHi_EL1", REG_APDBKeyHi_EL1, 0x182260, SR_READ | SR_WRITE},
   533  	{"APDBKeyLo_EL1", REG_APDBKeyLo_EL1, 0x182240, SR_READ | SR_WRITE},
   534  	{"APGAKeyHi_EL1", REG_APGAKeyHi_EL1, 0x182320, SR_READ | SR_WRITE},
   535  	{"APGAKeyLo_EL1", REG_APGAKeyLo_EL1, 0x182300, SR_READ | SR_WRITE},
   536  	{"APIAKeyHi_EL1", REG_APIAKeyHi_EL1, 0x182120, SR_READ | SR_WRITE},
   537  	{"APIAKeyLo_EL1", REG_APIAKeyLo_EL1, 0x182100, SR_READ | SR_WRITE},
   538  	{"APIBKeyHi_EL1", REG_APIBKeyHi_EL1, 0x182160, SR_READ | SR_WRITE},
   539  	{"APIBKeyLo_EL1", REG_APIBKeyLo_EL1, 0x182140, SR_READ | SR_WRITE},
   540  	{"CCSIDR2_EL1", REG_CCSIDR2_EL1, 0x190040, SR_READ},
   541  	{"CCSIDR_EL1", REG_CCSIDR_EL1, 0x190000, SR_READ},
   542  	{"CLIDR_EL1", REG_CLIDR_EL1, 0x190020, SR_READ},
   543  	{"CNTFRQ_EL0", REG_CNTFRQ_EL0, 0x1be000, SR_READ | SR_WRITE},
   544  	{"CNTKCTL_EL1", REG_CNTKCTL_EL1, 0x18e100, SR_READ | SR_WRITE},
   545  	{"CNTP_CTL_EL0", REG_CNTP_CTL_EL0, 0x1be220, SR_READ | SR_WRITE},
   546  	{"CNTP_CVAL_EL0", REG_CNTP_CVAL_EL0, 0x1be240, SR_READ | SR_WRITE},
   547  	{"CNTP_TVAL_EL0", REG_CNTP_TVAL_EL0, 0x1be200, SR_READ | SR_WRITE},
   548  	{"CNTPCT_EL0", REG_CNTPCT_EL0, 0x1be020, SR_READ},
   549  	{"CNTPS_CTL_EL1", REG_CNTPS_CTL_EL1, 0x1fe220, SR_READ | SR_WRITE},
   550  	{"CNTPS_CVAL_EL1", REG_CNTPS_CVAL_EL1, 0x1fe240, SR_READ | SR_WRITE},
   551  	{"CNTPS_TVAL_EL1", REG_CNTPS_TVAL_EL1, 0x1fe200, SR_READ | SR_WRITE},
   552  	{"CNTV_CTL_EL0", REG_CNTV_CTL_EL0, 0x1be320, SR_READ | SR_WRITE},
   553  	{"CNTV_CVAL_EL0", REG_CNTV_CVAL_EL0, 0x1be340, SR_READ | SR_WRITE},
   554  	{"CNTV_TVAL_EL0", REG_CNTV_TVAL_EL0, 0x1be300, SR_READ | SR_WRITE},
   555  	{"CNTVCT_EL0", REG_CNTVCT_EL0, 0x1be040, SR_READ},
   556  	{"CONTEXTIDR_EL1", REG_CONTEXTIDR_EL1, 0x18d020, SR_READ | SR_WRITE},
   557  	{"CPACR_EL1", REG_CPACR_EL1, 0x181040, SR_READ | SR_WRITE},
   558  	{"CSSELR_EL1", REG_CSSELR_EL1, 0x1a0000, SR_READ | SR_WRITE},
   559  	{"CTR_EL0", REG_CTR_EL0, 0x1b0020, SR_READ},
   560  	{"CurrentEL", REG_CurrentEL, 0x184240, SR_READ},
   561  	{"DAIF", REG_DAIF, 0x1b4220, SR_READ | SR_WRITE},
   562  	{"DBGAUTHSTATUS_EL1", REG_DBGAUTHSTATUS_EL1, 0x107ec0, SR_READ},
   563  	{"DBGBCR0_EL1", REG_DBGBCR0_EL1, 0x1000a0, SR_READ | SR_WRITE},
   564  	{"DBGBCR1_EL1", REG_DBGBCR1_EL1, 0x1001a0, SR_READ | SR_WRITE},
   565  	{"DBGBCR2_EL1", REG_DBGBCR2_EL1, 0x1002a0, SR_READ | SR_WRITE},
   566  	{"DBGBCR3_EL1", REG_DBGBCR3_EL1, 0x1003a0, SR_READ | SR_WRITE},
   567  	{"DBGBCR4_EL1", REG_DBGBCR4_EL1, 0x1004a0, SR_READ | SR_WRITE},
   568  	{"DBGBCR5_EL1", REG_DBGBCR5_EL1, 0x1005a0, SR_READ | SR_WRITE},
   569  	{"DBGBCR6_EL1", REG_DBGBCR6_EL1, 0x1006a0, SR_READ | SR_WRITE},
   570  	{"DBGBCR7_EL1", REG_DBGBCR7_EL1, 0x1007a0, SR_READ | SR_WRITE},
   571  	{"DBGBCR8_EL1", REG_DBGBCR8_EL1, 0x1008a0, SR_READ | SR_WRITE},
   572  	{"DBGBCR9_EL1", REG_DBGBCR9_EL1, 0x1009a0, SR_READ | SR_WRITE},
   573  	{"DBGBCR10_EL1", REG_DBGBCR10_EL1, 0x100aa0, SR_READ | SR_WRITE},
   574  	{"DBGBCR11_EL1", REG_DBGBCR11_EL1, 0x100ba0, SR_READ | SR_WRITE},
   575  	{"DBGBCR12_EL1", REG_DBGBCR12_EL1, 0x100ca0, SR_READ | SR_WRITE},
   576  	{"DBGBCR13_EL1", REG_DBGBCR13_EL1, 0x100da0, SR_READ | SR_WRITE},
   577  	{"DBGBCR14_EL1", REG_DBGBCR14_EL1, 0x100ea0, SR_READ | SR_WRITE},
   578  	{"DBGBCR15_EL1", REG_DBGBCR15_EL1, 0x100fa0, SR_READ | SR_WRITE},
   579  	{"DBGBVR0_EL1", REG_DBGBVR0_EL1, 0x100080, SR_READ | SR_WRITE},
   580  	{"DBGBVR1_EL1", REG_DBGBVR1_EL1, 0x100180, SR_READ | SR_WRITE},
   581  	{"DBGBVR2_EL1", REG_DBGBVR2_EL1, 0x100280, SR_READ | SR_WRITE},
   582  	{"DBGBVR3_EL1", REG_DBGBVR3_EL1, 0x100380, SR_READ | SR_WRITE},
   583  	{"DBGBVR4_EL1", REG_DBGBVR4_EL1, 0x100480, SR_READ | SR_WRITE},
   584  	{"DBGBVR5_EL1", REG_DBGBVR5_EL1, 0x100580, SR_READ | SR_WRITE},
   585  	{"DBGBVR6_EL1", REG_DBGBVR6_EL1, 0x100680, SR_READ | SR_WRITE},
   586  	{"DBGBVR7_EL1", REG_DBGBVR7_EL1, 0x100780, SR_READ | SR_WRITE},
   587  	{"DBGBVR8_EL1", REG_DBGBVR8_EL1, 0x100880, SR_READ | SR_WRITE},
   588  	{"DBGBVR9_EL1", REG_DBGBVR9_EL1, 0x100980, SR_READ | SR_WRITE},
   589  	{"DBGBVR10_EL1", REG_DBGBVR10_EL1, 0x100a80, SR_READ | SR_WRITE},
   590  	{"DBGBVR11_EL1", REG_DBGBVR11_EL1, 0x100b80, SR_READ | SR_WRITE},
   591  	{"DBGBVR12_EL1", REG_DBGBVR12_EL1, 0x100c80, SR_READ | SR_WRITE},
   592  	{"DBGBVR13_EL1", REG_DBGBVR13_EL1, 0x100d80, SR_READ | SR_WRITE},
   593  	{"DBGBVR14_EL1", REG_DBGBVR14_EL1, 0x100e80, SR_READ | SR_WRITE},
   594  	{"DBGBVR15_EL1", REG_DBGBVR15_EL1, 0x100f80, SR_READ | SR_WRITE},
   595  	{"DBGCLAIMCLR_EL1", REG_DBGCLAIMCLR_EL1, 0x1079c0, SR_READ | SR_WRITE},
   596  	{"DBGCLAIMSET_EL1", REG_DBGCLAIMSET_EL1, 0x1078c0, SR_READ | SR_WRITE},
   597  	{"DBGDTR_EL0", REG_DBGDTR_EL0, 0x130400, SR_READ | SR_WRITE},
   598  	{"DBGDTRRX_EL0", REG_DBGDTRRX_EL0, 0x130500, SR_READ},
   599  	{"DBGDTRTX_EL0", REG_DBGDTRTX_EL0, 0x130500, SR_WRITE},
   600  	{"DBGPRCR_EL1", REG_DBGPRCR_EL1, 0x101480, SR_READ | SR_WRITE},
   601  	{"DBGWCR0_EL1", REG_DBGWCR0_EL1, 0x1000e0, SR_READ | SR_WRITE},
   602  	{"DBGWCR1_EL1", REG_DBGWCR1_EL1, 0x1001e0, SR_READ | SR_WRITE},
   603  	{"DBGWCR2_EL1", REG_DBGWCR2_EL1, 0x1002e0, SR_READ | SR_WRITE},
   604  	{"DBGWCR3_EL1", REG_DBGWCR3_EL1, 0x1003e0, SR_READ | SR_WRITE},
   605  	{"DBGWCR4_EL1", REG_DBGWCR4_EL1, 0x1004e0, SR_READ | SR_WRITE},
   606  	{"DBGWCR5_EL1", REG_DBGWCR5_EL1, 0x1005e0, SR_READ | SR_WRITE},
   607  	{"DBGWCR6_EL1", REG_DBGWCR6_EL1, 0x1006e0, SR_READ | SR_WRITE},
   608  	{"DBGWCR7_EL1", REG_DBGWCR7_EL1, 0x1007e0, SR_READ | SR_WRITE},
   609  	{"DBGWCR8_EL1", REG_DBGWCR8_EL1, 0x1008e0, SR_READ | SR_WRITE},
   610  	{"DBGWCR9_EL1", REG_DBGWCR9_EL1, 0x1009e0, SR_READ | SR_WRITE},
   611  	{"DBGWCR10_EL1", REG_DBGWCR10_EL1, 0x100ae0, SR_READ | SR_WRITE},
   612  	{"DBGWCR11_EL1", REG_DBGWCR11_EL1, 0x100be0, SR_READ | SR_WRITE},
   613  	{"DBGWCR12_EL1", REG_DBGWCR12_EL1, 0x100ce0, SR_READ | SR_WRITE},
   614  	{"DBGWCR13_EL1", REG_DBGWCR13_EL1, 0x100de0, SR_READ | SR_WRITE},
   615  	{"DBGWCR14_EL1", REG_DBGWCR14_EL1, 0x100ee0, SR_READ | SR_WRITE},
   616  	{"DBGWCR15_EL1", REG_DBGWCR15_EL1, 0x100fe0, SR_READ | SR_WRITE},
   617  	{"DBGWVR0_EL1", REG_DBGWVR0_EL1, 0x1000c0, SR_READ | SR_WRITE},
   618  	{"DBGWVR1_EL1", REG_DBGWVR1_EL1, 0x1001c0, SR_READ | SR_WRITE},
   619  	{"DBGWVR2_EL1", REG_DBGWVR2_EL1, 0x1002c0, SR_READ | SR_WRITE},
   620  	{"DBGWVR3_EL1", REG_DBGWVR3_EL1, 0x1003c0, SR_READ | SR_WRITE},
   621  	{"DBGWVR4_EL1", REG_DBGWVR4_EL1, 0x1004c0, SR_READ | SR_WRITE},
   622  	{"DBGWVR5_EL1", REG_DBGWVR5_EL1, 0x1005c0, SR_READ | SR_WRITE},
   623  	{"DBGWVR6_EL1", REG_DBGWVR6_EL1, 0x1006c0, SR_READ | SR_WRITE},
   624  	{"DBGWVR7_EL1", REG_DBGWVR7_EL1, 0x1007c0, SR_READ | SR_WRITE},
   625  	{"DBGWVR8_EL1", REG_DBGWVR8_EL1, 0x1008c0, SR_READ | SR_WRITE},
   626  	{"DBGWVR9_EL1", REG_DBGWVR9_EL1, 0x1009c0, SR_READ | SR_WRITE},
   627  	{"DBGWVR10_EL1", REG_DBGWVR10_EL1, 0x100ac0, SR_READ | SR_WRITE},
   628  	{"DBGWVR11_EL1", REG_DBGWVR11_EL1, 0x100bc0, SR_READ | SR_WRITE},
   629  	{"DBGWVR12_EL1", REG_DBGWVR12_EL1, 0x100cc0, SR_READ | SR_WRITE},
   630  	{"DBGWVR13_EL1", REG_DBGWVR13_EL1, 0x100dc0, SR_READ | SR_WRITE},
   631  	{"DBGWVR14_EL1", REG_DBGWVR14_EL1, 0x100ec0, SR_READ | SR_WRITE},
   632  	{"DBGWVR15_EL1", REG_DBGWVR15_EL1, 0x100fc0, SR_READ | SR_WRITE},
   633  	{"DCZID_EL0", REG_DCZID_EL0, 0x1b00e0, SR_READ},
   634  	{"DISR_EL1", REG_DISR_EL1, 0x18c120, SR_READ | SR_WRITE},
   635  	{"DIT", REG_DIT, 0x1b42a0, SR_READ | SR_WRITE},
   636  	{"DLR_EL0", REG_DLR_EL0, 0x1b4520, SR_READ | SR_WRITE},
   637  	{"DSPSR_EL0", REG_DSPSR_EL0, 0x1b4500, SR_READ | SR_WRITE},
   638  	{"ELR_EL1", REG_ELR_EL1, 0x184020, SR_READ | SR_WRITE},
   639  	{"ERRIDR_EL1", REG_ERRIDR_EL1, 0x185300, SR_READ},
   640  	{"ERRSELR_EL1", REG_ERRSELR_EL1, 0x185320, SR_READ | SR_WRITE},
   641  	{"ERXADDR_EL1", REG_ERXADDR_EL1, 0x185460, SR_READ | SR_WRITE},
   642  	{"ERXCTLR_EL1", REG_ERXCTLR_EL1, 0x185420, SR_READ | SR_WRITE},
   643  	{"ERXFR_EL1", REG_ERXFR_EL1, 0x185400, SR_READ},
   644  	{"ERXMISC0_EL1", REG_ERXMISC0_EL1, 0x185500, SR_READ | SR_WRITE},
   645  	{"ERXMISC1_EL1", REG_ERXMISC1_EL1, 0x185520, SR_READ | SR_WRITE},
   646  	{"ERXMISC2_EL1", REG_ERXMISC2_EL1, 0x185540, SR_READ | SR_WRITE},
   647  	{"ERXMISC3_EL1", REG_ERXMISC3_EL1, 0x185560, SR_READ | SR_WRITE},
   648  	{"ERXPFGCDN_EL1", REG_ERXPFGCDN_EL1, 0x1854c0, SR_READ | SR_WRITE},
   649  	{"ERXPFGCTL_EL1", REG_ERXPFGCTL_EL1, 0x1854a0, SR_READ | SR_WRITE},
   650  	{"ERXPFGF_EL1", REG_ERXPFGF_EL1, 0x185480, SR_READ},
   651  	{"ERXSTATUS_EL1", REG_ERXSTATUS_EL1, 0x185440, SR_READ | SR_WRITE},
   652  	{"ESR_EL1", REG_ESR_EL1, 0x185200, SR_READ | SR_WRITE},
   653  	{"FAR_EL1", REG_FAR_EL1, 0x186000, SR_READ | SR_WRITE},
   654  	{"FPCR", REG_FPCR, 0x1b4400, SR_READ | SR_WRITE},
   655  	{"FPSR", REG_FPSR, 0x1b4420, SR_READ | SR_WRITE},
   656  	{"GCR_EL1", REG_GCR_EL1, 0x1810c0, SR_READ | SR_WRITE},
   657  	{"GMID_EL1", REG_GMID_EL1, 0x31400, SR_READ},
   658  	{"ICC_AP0R0_EL1", REG_ICC_AP0R0_EL1, 0x18c880, SR_READ | SR_WRITE},
   659  	{"ICC_AP0R1_EL1", REG_ICC_AP0R1_EL1, 0x18c8a0, SR_READ | SR_WRITE},
   660  	{"ICC_AP0R2_EL1", REG_ICC_AP0R2_EL1, 0x18c8c0, SR_READ | SR_WRITE},
   661  	{"ICC_AP0R3_EL1", REG_ICC_AP0R3_EL1, 0x18c8e0, SR_READ | SR_WRITE},
   662  	{"ICC_AP1R0_EL1", REG_ICC_AP1R0_EL1, 0x18c900, SR_READ | SR_WRITE},
   663  	{"ICC_AP1R1_EL1", REG_ICC_AP1R1_EL1, 0x18c920, SR_READ | SR_WRITE},
   664  	{"ICC_AP1R2_EL1", REG_ICC_AP1R2_EL1, 0x18c940, SR_READ | SR_WRITE},
   665  	{"ICC_AP1R3_EL1", REG_ICC_AP1R3_EL1, 0x18c960, SR_READ | SR_WRITE},
   666  	{"ICC_ASGI1R_EL1", REG_ICC_ASGI1R_EL1, 0x18cbc0, SR_WRITE},
   667  	{"ICC_BPR0_EL1", REG_ICC_BPR0_EL1, 0x18c860, SR_READ | SR_WRITE},
   668  	{"ICC_BPR1_EL1", REG_ICC_BPR1_EL1, 0x18cc60, SR_READ | SR_WRITE},
   669  	{"ICC_CTLR_EL1", REG_ICC_CTLR_EL1, 0x18cc80, SR_READ | SR_WRITE},
   670  	{"ICC_DIR_EL1", REG_ICC_DIR_EL1, 0x18cb20, SR_WRITE},
   671  	{"ICC_EOIR0_EL1", REG_ICC_EOIR0_EL1, 0x18c820, SR_WRITE},
   672  	{"ICC_EOIR1_EL1", REG_ICC_EOIR1_EL1, 0x18cc20, SR_WRITE},
   673  	{"ICC_HPPIR0_EL1", REG_ICC_HPPIR0_EL1, 0x18c840, SR_READ},
   674  	{"ICC_HPPIR1_EL1", REG_ICC_HPPIR1_EL1, 0x18cc40, SR_READ},
   675  	{"ICC_IAR0_EL1", REG_ICC_IAR0_EL1, 0x18c800, SR_READ},
   676  	{"ICC_IAR1_EL1", REG_ICC_IAR1_EL1, 0x18cc00, SR_READ},
   677  	{"ICC_IGRPEN0_EL1", REG_ICC_IGRPEN0_EL1, 0x18ccc0, SR_READ | SR_WRITE},
   678  	{"ICC_IGRPEN1_EL1", REG_ICC_IGRPEN1_EL1, 0x18cce0, SR_READ | SR_WRITE},
   679  	{"ICC_PMR_EL1", REG_ICC_PMR_EL1, 0x184600, SR_READ | SR_WRITE},
   680  	{"ICC_RPR_EL1", REG_ICC_RPR_EL1, 0x18cb60, SR_READ},
   681  	{"ICC_SGI0R_EL1", REG_ICC_SGI0R_EL1, 0x18cbe0, SR_WRITE},
   682  	{"ICC_SGI1R_EL1", REG_ICC_SGI1R_EL1, 0x18cba0, SR_WRITE},
   683  	{"ICC_SRE_EL1", REG_ICC_SRE_EL1, 0x18cca0, SR_READ | SR_WRITE},
   684  	{"ICV_AP0R0_EL1", REG_ICV_AP0R0_EL1, 0x18c880, SR_READ | SR_WRITE},
   685  	{"ICV_AP0R1_EL1", REG_ICV_AP0R1_EL1, 0x18c8a0, SR_READ | SR_WRITE},
   686  	{"ICV_AP0R2_EL1", REG_ICV_AP0R2_EL1, 0x18c8c0, SR_READ | SR_WRITE},
   687  	{"ICV_AP0R3_EL1", REG_ICV_AP0R3_EL1, 0x18c8e0, SR_READ | SR_WRITE},
   688  	{"ICV_AP1R0_EL1", REG_ICV_AP1R0_EL1, 0x18c900, SR_READ | SR_WRITE},
   689  	{"ICV_AP1R1_EL1", REG_ICV_AP1R1_EL1, 0x18c920, SR_READ | SR_WRITE},
   690  	{"ICV_AP1R2_EL1", REG_ICV_AP1R2_EL1, 0x18c940, SR_READ | SR_WRITE},
   691  	{"ICV_AP1R3_EL1", REG_ICV_AP1R3_EL1, 0x18c960, SR_READ | SR_WRITE},
   692  	{"ICV_BPR0_EL1", REG_ICV_BPR0_EL1, 0x18c860, SR_READ | SR_WRITE},
   693  	{"ICV_BPR1_EL1", REG_ICV_BPR1_EL1, 0x18cc60, SR_READ | SR_WRITE},
   694  	{"ICV_CTLR_EL1", REG_ICV_CTLR_EL1, 0x18cc80, SR_READ | SR_WRITE},
   695  	{"ICV_DIR_EL1", REG_ICV_DIR_EL1, 0x18cb20, SR_WRITE},
   696  	{"ICV_EOIR0_EL1", REG_ICV_EOIR0_EL1, 0x18c820, SR_WRITE},
   697  	{"ICV_EOIR1_EL1", REG_ICV_EOIR1_EL1, 0x18cc20, SR_WRITE},
   698  	{"ICV_HPPIR0_EL1", REG_ICV_HPPIR0_EL1, 0x18c840, SR_READ},
   699  	{"ICV_HPPIR1_EL1", REG_ICV_HPPIR1_EL1, 0x18cc40, SR_READ},
   700  	{"ICV_IAR0_EL1", REG_ICV_IAR0_EL1, 0x18c800, SR_READ},
   701  	{"ICV_IAR1_EL1", REG_ICV_IAR1_EL1, 0x18cc00, SR_READ},
   702  	{"ICV_IGRPEN0_EL1", REG_ICV_IGRPEN0_EL1, 0x18ccc0, SR_READ | SR_WRITE},
   703  	{"ICV_IGRPEN1_EL1", REG_ICV_IGRPEN1_EL1, 0x18cce0, SR_READ | SR_WRITE},
   704  	{"ICV_PMR_EL1", REG_ICV_PMR_EL1, 0x184600, SR_READ | SR_WRITE},
   705  	{"ICV_RPR_EL1", REG_ICV_RPR_EL1, 0x18cb60, SR_READ},
   706  	{"ID_AA64AFR0_EL1", REG_ID_AA64AFR0_EL1, 0x180580, SR_READ},
   707  	{"ID_AA64AFR1_EL1", REG_ID_AA64AFR1_EL1, 0x1805a0, SR_READ},
   708  	{"ID_AA64DFR0_EL1", REG_ID_AA64DFR0_EL1, 0x180500, SR_READ},
   709  	{"ID_AA64DFR1_EL1", REG_ID_AA64DFR1_EL1, 0x180520, SR_READ},
   710  	{"ID_AA64ISAR0_EL1", REG_ID_AA64ISAR0_EL1, 0x180600, SR_READ},
   711  	{"ID_AA64ISAR1_EL1", REG_ID_AA64ISAR1_EL1, 0x180620, SR_READ},
   712  	{"ID_AA64MMFR0_EL1", REG_ID_AA64MMFR0_EL1, 0x180700, SR_READ},
   713  	{"ID_AA64MMFR1_EL1", REG_ID_AA64MMFR1_EL1, 0x180720, SR_READ},
   714  	{"ID_AA64MMFR2_EL1", REG_ID_AA64MMFR2_EL1, 0x180740, SR_READ},
   715  	{"ID_AA64PFR0_EL1", REG_ID_AA64PFR0_EL1, 0x180400, SR_READ},
   716  	{"ID_AA64PFR1_EL1", REG_ID_AA64PFR1_EL1, 0x180420, SR_READ},
   717  	{"ID_AA64ZFR0_EL1", REG_ID_AA64ZFR0_EL1, 0x180480, SR_READ},
   718  	{"ID_AFR0_EL1", REG_ID_AFR0_EL1, 0x180160, SR_READ},
   719  	{"ID_DFR0_EL1", REG_ID_DFR0_EL1, 0x180140, SR_READ},
   720  	{"ID_ISAR0_EL1", REG_ID_ISAR0_EL1, 0x180200, SR_READ},
   721  	{"ID_ISAR1_EL1", REG_ID_ISAR1_EL1, 0x180220, SR_READ},
   722  	{"ID_ISAR2_EL1", REG_ID_ISAR2_EL1, 0x180240, SR_READ},
   723  	{"ID_ISAR3_EL1", REG_ID_ISAR3_EL1, 0x180260, SR_READ},
   724  	{"ID_ISAR4_EL1", REG_ID_ISAR4_EL1, 0x180280, SR_READ},
   725  	{"ID_ISAR5_EL1", REG_ID_ISAR5_EL1, 0x1802a0, SR_READ},
   726  	{"ID_ISAR6_EL1", REG_ID_ISAR6_EL1, 0x1802e0, SR_READ},
   727  	{"ID_MMFR0_EL1", REG_ID_MMFR0_EL1, 0x180180, SR_READ},
   728  	{"ID_MMFR1_EL1", REG_ID_MMFR1_EL1, 0x1801a0, SR_READ},
   729  	{"ID_MMFR2_EL1", REG_ID_MMFR2_EL1, 0x1801c0, SR_READ},
   730  	{"ID_MMFR3_EL1", REG_ID_MMFR3_EL1, 0x1801e0, SR_READ},
   731  	{"ID_MMFR4_EL1", REG_ID_MMFR4_EL1, 0x1802c0, SR_READ},
   732  	{"ID_PFR0_EL1", REG_ID_PFR0_EL1, 0x180100, SR_READ},
   733  	{"ID_PFR1_EL1", REG_ID_PFR1_EL1, 0x180120, SR_READ},
   734  	{"ID_PFR2_EL1", REG_ID_PFR2_EL1, 0x180380, SR_READ},
   735  	{"ISR_EL1", REG_ISR_EL1, 0x18c100, SR_READ},
   736  	{"LORC_EL1", REG_LORC_EL1, 0x18a460, SR_READ | SR_WRITE},
   737  	{"LOREA_EL1", REG_LOREA_EL1, 0x18a420, SR_READ | SR_WRITE},
   738  	{"LORID_EL1", REG_LORID_EL1, 0x18a4e0, SR_READ},
   739  	{"LORN_EL1", REG_LORN_EL1, 0x18a440, SR_READ | SR_WRITE},
   740  	{"LORSA_EL1", REG_LORSA_EL1, 0x18a400, SR_READ | SR_WRITE},
   741  	{"MAIR_EL1", REG_MAIR_EL1, 0x18a200, SR_READ | SR_WRITE},
   742  	{"MDCCINT_EL1", REG_MDCCINT_EL1, 0x100200, SR_READ | SR_WRITE},
   743  	{"MDCCSR_EL0", REG_MDCCSR_EL0, 0x130100, SR_READ},
   744  	{"MDRAR_EL1", REG_MDRAR_EL1, 0x101000, SR_READ},
   745  	{"MDSCR_EL1", REG_MDSCR_EL1, 0x100240, SR_READ | SR_WRITE},
   746  	{"MIDR_EL1", REG_MIDR_EL1, 0x180000, SR_READ},
   747  	{"MPAM0_EL1", REG_MPAM0_EL1, 0x18a520, SR_READ | SR_WRITE},
   748  	{"MPAM1_EL1", REG_MPAM1_EL1, 0x18a500, SR_READ | SR_WRITE},
   749  	{"MPAMIDR_EL1", REG_MPAMIDR_EL1, 0x18a480, SR_READ},
   750  	{"MPIDR_EL1", REG_MPIDR_EL1, 0x1800a0, SR_READ},
   751  	{"MVFR0_EL1", REG_MVFR0_EL1, 0x180300, SR_READ},
   752  	{"MVFR1_EL1", REG_MVFR1_EL1, 0x180320, SR_READ},
   753  	{"MVFR2_EL1", REG_MVFR2_EL1, 0x180340, SR_READ},
   754  	{"NZCV", REG_NZCV, 0x1b4200, SR_READ | SR_WRITE},
   755  	{"OSDLR_EL1", REG_OSDLR_EL1, 0x101380, SR_READ | SR_WRITE},
   756  	{"OSDTRRX_EL1", REG_OSDTRRX_EL1, 0x100040, SR_READ | SR_WRITE},
   757  	{"OSDTRTX_EL1", REG_OSDTRTX_EL1, 0x100340, SR_READ | SR_WRITE},
   758  	{"OSECCR_EL1", REG_OSECCR_EL1, 0x100640, SR_READ | SR_WRITE},
   759  	{"OSLAR_EL1", REG_OSLAR_EL1, 0x101080, SR_WRITE},
   760  	{"OSLSR_EL1", REG_OSLSR_EL1, 0x101180, SR_READ},
   761  	{"PAN", REG_PAN, 0x184260, SR_READ | SR_WRITE},
   762  	{"PAR_EL1", REG_PAR_EL1, 0x187400, SR_READ | SR_WRITE},
   763  	{"PMBIDR_EL1", REG_PMBIDR_EL1, 0x189ae0, SR_READ},
   764  	{"PMBLIMITR_EL1", REG_PMBLIMITR_EL1, 0x189a00, SR_READ | SR_WRITE},
   765  	{"PMBPTR_EL1", REG_PMBPTR_EL1, 0x189a20, SR_READ | SR_WRITE},
   766  	{"PMBSR_EL1", REG_PMBSR_EL1, 0x189a60, SR_READ | SR_WRITE},
   767  	{"PMCCFILTR_EL0", REG_PMCCFILTR_EL0, 0x1befe0, SR_READ | SR_WRITE},
   768  	{"PMCCNTR_EL0", REG_PMCCNTR_EL0, 0x1b9d00, SR_READ | SR_WRITE},
   769  	{"PMCEID0_EL0", REG_PMCEID0_EL0, 0x1b9cc0, SR_READ},
   770  	{"PMCEID1_EL0", REG_PMCEID1_EL0, 0x1b9ce0, SR_READ},
   771  	{"PMCNTENCLR_EL0", REG_PMCNTENCLR_EL0, 0x1b9c40, SR_READ | SR_WRITE},
   772  	{"PMCNTENSET_EL0", REG_PMCNTENSET_EL0, 0x1b9c20, SR_READ | SR_WRITE},
   773  	{"PMCR_EL0", REG_PMCR_EL0, 0x1b9c00, SR_READ | SR_WRITE},
   774  	{"PMEVCNTR0_EL0", REG_PMEVCNTR0_EL0, 0x1be800, SR_READ | SR_WRITE},
   775  	{"PMEVCNTR1_EL0", REG_PMEVCNTR1_EL0, 0x1be820, SR_READ | SR_WRITE},
   776  	{"PMEVCNTR2_EL0", REG_PMEVCNTR2_EL0, 0x1be840, SR_READ | SR_WRITE},
   777  	{"PMEVCNTR3_EL0", REG_PMEVCNTR3_EL0, 0x1be860, SR_READ | SR_WRITE},
   778  	{"PMEVCNTR4_EL0", REG_PMEVCNTR4_EL0, 0x1be880, SR_READ | SR_WRITE},
   779  	{"PMEVCNTR5_EL0", REG_PMEVCNTR5_EL0, 0x1be8a0, SR_READ | SR_WRITE},
   780  	{"PMEVCNTR6_EL0", REG_PMEVCNTR6_EL0, 0x1be8c0, SR_READ | SR_WRITE},
   781  	{"PMEVCNTR7_EL0", REG_PMEVCNTR7_EL0, 0x1be8e0, SR_READ | SR_WRITE},
   782  	{"PMEVCNTR8_EL0", REG_PMEVCNTR8_EL0, 0x1be900, SR_READ | SR_WRITE},
   783  	{"PMEVCNTR9_EL0", REG_PMEVCNTR9_EL0, 0x1be920, SR_READ | SR_WRITE},
   784  	{"PMEVCNTR10_EL0", REG_PMEVCNTR10_EL0, 0x1be940, SR_READ | SR_WRITE},
   785  	{"PMEVCNTR11_EL0", REG_PMEVCNTR11_EL0, 0x1be960, SR_READ | SR_WRITE},
   786  	{"PMEVCNTR12_EL0", REG_PMEVCNTR12_EL0, 0x1be980, SR_READ | SR_WRITE},
   787  	{"PMEVCNTR13_EL0", REG_PMEVCNTR13_EL0, 0x1be9a0, SR_READ | SR_WRITE},
   788  	{"PMEVCNTR14_EL0", REG_PMEVCNTR14_EL0, 0x1be9c0, SR_READ | SR_WRITE},
   789  	{"PMEVCNTR15_EL0", REG_PMEVCNTR15_EL0, 0x1be9e0, SR_READ | SR_WRITE},
   790  	{"PMEVCNTR16_EL0", REG_PMEVCNTR16_EL0, 0x1bea00, SR_READ | SR_WRITE},
   791  	{"PMEVCNTR17_EL0", REG_PMEVCNTR17_EL0, 0x1bea20, SR_READ | SR_WRITE},
   792  	{"PMEVCNTR18_EL0", REG_PMEVCNTR18_EL0, 0x1bea40, SR_READ | SR_WRITE},
   793  	{"PMEVCNTR19_EL0", REG_PMEVCNTR19_EL0, 0x1bea60, SR_READ | SR_WRITE},
   794  	{"PMEVCNTR20_EL0", REG_PMEVCNTR20_EL0, 0x1bea80, SR_READ | SR_WRITE},
   795  	{"PMEVCNTR21_EL0", REG_PMEVCNTR21_EL0, 0x1beaa0, SR_READ | SR_WRITE},
   796  	{"PMEVCNTR22_EL0", REG_PMEVCNTR22_EL0, 0x1beac0, SR_READ | SR_WRITE},
   797  	{"PMEVCNTR23_EL0", REG_PMEVCNTR23_EL0, 0x1beae0, SR_READ | SR_WRITE},
   798  	{"PMEVCNTR24_EL0", REG_PMEVCNTR24_EL0, 0x1beb00, SR_READ | SR_WRITE},
   799  	{"PMEVCNTR25_EL0", REG_PMEVCNTR25_EL0, 0x1beb20, SR_READ | SR_WRITE},
   800  	{"PMEVCNTR26_EL0", REG_PMEVCNTR26_EL0, 0x1beb40, SR_READ | SR_WRITE},
   801  	{"PMEVCNTR27_EL0", REG_PMEVCNTR27_EL0, 0x1beb60, SR_READ | SR_WRITE},
   802  	{"PMEVCNTR28_EL0", REG_PMEVCNTR28_EL0, 0x1beb80, SR_READ | SR_WRITE},
   803  	{"PMEVCNTR29_EL0", REG_PMEVCNTR29_EL0, 0x1beba0, SR_READ | SR_WRITE},
   804  	{"PMEVCNTR30_EL0", REG_PMEVCNTR30_EL0, 0x1bebc0, SR_READ | SR_WRITE},
   805  	{"PMEVTYPER0_EL0", REG_PMEVTYPER0_EL0, 0x1bec00, SR_READ | SR_WRITE},
   806  	{"PMEVTYPER1_EL0", REG_PMEVTYPER1_EL0, 0x1bec20, SR_READ | SR_WRITE},
   807  	{"PMEVTYPER2_EL0", REG_PMEVTYPER2_EL0, 0x1bec40, SR_READ | SR_WRITE},
   808  	{"PMEVTYPER3_EL0", REG_PMEVTYPER3_EL0, 0x1bec60, SR_READ | SR_WRITE},
   809  	{"PMEVTYPER4_EL0", REG_PMEVTYPER4_EL0, 0x1bec80, SR_READ | SR_WRITE},
   810  	{"PMEVTYPER5_EL0", REG_PMEVTYPER5_EL0, 0x1beca0, SR_READ | SR_WRITE},
   811  	{"PMEVTYPER6_EL0", REG_PMEVTYPER6_EL0, 0x1becc0, SR_READ | SR_WRITE},
   812  	{"PMEVTYPER7_EL0", REG_PMEVTYPER7_EL0, 0x1bece0, SR_READ | SR_WRITE},
   813  	{"PMEVTYPER8_EL0", REG_PMEVTYPER8_EL0, 0x1bed00, SR_READ | SR_WRITE},
   814  	{"PMEVTYPER9_EL0", REG_PMEVTYPER9_EL0, 0x1bed20, SR_READ | SR_WRITE},
   815  	{"PMEVTYPER10_EL0", REG_PMEVTYPER10_EL0, 0x1bed40, SR_READ | SR_WRITE},
   816  	{"PMEVTYPER11_EL0", REG_PMEVTYPER11_EL0, 0x1bed60, SR_READ | SR_WRITE},
   817  	{"PMEVTYPER12_EL0", REG_PMEVTYPER12_EL0, 0x1bed80, SR_READ | SR_WRITE},
   818  	{"PMEVTYPER13_EL0", REG_PMEVTYPER13_EL0, 0x1beda0, SR_READ | SR_WRITE},
   819  	{"PMEVTYPER14_EL0", REG_PMEVTYPER14_EL0, 0x1bedc0, SR_READ | SR_WRITE},
   820  	{"PMEVTYPER15_EL0", REG_PMEVTYPER15_EL0, 0x1bede0, SR_READ | SR_WRITE},
   821  	{"PMEVTYPER16_EL0", REG_PMEVTYPER16_EL0, 0x1bee00, SR_READ | SR_WRITE},
   822  	{"PMEVTYPER17_EL0", REG_PMEVTYPER17_EL0, 0x1bee20, SR_READ | SR_WRITE},
   823  	{"PMEVTYPER18_EL0", REG_PMEVTYPER18_EL0, 0x1bee40, SR_READ | SR_WRITE},
   824  	{"PMEVTYPER19_EL0", REG_PMEVTYPER19_EL0, 0x1bee60, SR_READ | SR_WRITE},
   825  	{"PMEVTYPER20_EL0", REG_PMEVTYPER20_EL0, 0x1bee80, SR_READ | SR_WRITE},
   826  	{"PMEVTYPER21_EL0", REG_PMEVTYPER21_EL0, 0x1beea0, SR_READ | SR_WRITE},
   827  	{"PMEVTYPER22_EL0", REG_PMEVTYPER22_EL0, 0x1beec0, SR_READ | SR_WRITE},
   828  	{"PMEVTYPER23_EL0", REG_PMEVTYPER23_EL0, 0x1beee0, SR_READ | SR_WRITE},
   829  	{"PMEVTYPER24_EL0", REG_PMEVTYPER24_EL0, 0x1bef00, SR_READ | SR_WRITE},
   830  	{"PMEVTYPER25_EL0", REG_PMEVTYPER25_EL0, 0x1bef20, SR_READ | SR_WRITE},
   831  	{"PMEVTYPER26_EL0", REG_PMEVTYPER26_EL0, 0x1bef40, SR_READ | SR_WRITE},
   832  	{"PMEVTYPER27_EL0", REG_PMEVTYPER27_EL0, 0x1bef60, SR_READ | SR_WRITE},
   833  	{"PMEVTYPER28_EL0", REG_PMEVTYPER28_EL0, 0x1bef80, SR_READ | SR_WRITE},
   834  	{"PMEVTYPER29_EL0", REG_PMEVTYPER29_EL0, 0x1befa0, SR_READ | SR_WRITE},
   835  	{"PMEVTYPER30_EL0", REG_PMEVTYPER30_EL0, 0x1befc0, SR_READ | SR_WRITE},
   836  	{"PMINTENCLR_EL1", REG_PMINTENCLR_EL1, 0x189e40, SR_READ | SR_WRITE},
   837  	{"PMINTENSET_EL1", REG_PMINTENSET_EL1, 0x189e20, SR_READ | SR_WRITE},
   838  	{"PMMIR_EL1", REG_PMMIR_EL1, 0x189ec0, SR_READ},
   839  	{"PMOVSCLR_EL0", REG_PMOVSCLR_EL0, 0x1b9c60, SR_READ | SR_WRITE},
   840  	{"PMOVSSET_EL0", REG_PMOVSSET_EL0, 0x1b9e60, SR_READ | SR_WRITE},
   841  	{"PMSCR_EL1", REG_PMSCR_EL1, 0x189900, SR_READ | SR_WRITE},
   842  	{"PMSELR_EL0", REG_PMSELR_EL0, 0x1b9ca0, SR_READ | SR_WRITE},
   843  	{"PMSEVFR_EL1", REG_PMSEVFR_EL1, 0x1899a0, SR_READ | SR_WRITE},
   844  	{"PMSFCR_EL1", REG_PMSFCR_EL1, 0x189980, SR_READ | SR_WRITE},
   845  	{"PMSICR_EL1", REG_PMSICR_EL1, 0x189940, SR_READ | SR_WRITE},
   846  	{"PMSIDR_EL1", REG_PMSIDR_EL1, 0x1899e0, SR_READ},
   847  	{"PMSIRR_EL1", REG_PMSIRR_EL1, 0x189960, SR_READ | SR_WRITE},
   848  	{"PMSLATFR_EL1", REG_PMSLATFR_EL1, 0x1899c0, SR_READ | SR_WRITE},
   849  	{"PMSWINC_EL0", REG_PMSWINC_EL0, 0x1b9c80, SR_WRITE},
   850  	{"PMUSERENR_EL0", REG_PMUSERENR_EL0, 0x1b9e00, SR_READ | SR_WRITE},
   851  	{"PMXEVCNTR_EL0", REG_PMXEVCNTR_EL0, 0x1b9d40, SR_READ | SR_WRITE},
   852  	{"PMXEVTYPER_EL0", REG_PMXEVTYPER_EL0, 0x1b9d20, SR_READ | SR_WRITE},
   853  	{"REVIDR_EL1", REG_REVIDR_EL1, 0x1800c0, SR_READ},
   854  	{"RGSR_EL1", REG_RGSR_EL1, 0x1810a0, SR_READ | SR_WRITE},
   855  	{"RMR_EL1", REG_RMR_EL1, 0x18c040, SR_READ | SR_WRITE},
   856  	{"RNDR", REG_RNDR, 0x1b2400, SR_READ},
   857  	{"RNDRRS", REG_RNDRRS, 0x1b2420, SR_READ},
   858  	{"RVBAR_EL1", REG_RVBAR_EL1, 0x18c020, SR_READ},
   859  	{"SCTLR_EL1", REG_SCTLR_EL1, 0x181000, SR_READ | SR_WRITE},
   860  	{"SCXTNUM_EL0", REG_SCXTNUM_EL0, 0x1bd0e0, SR_READ | SR_WRITE},
   861  	{"SCXTNUM_EL1", REG_SCXTNUM_EL1, 0x18d0e0, SR_READ | SR_WRITE},
   862  	{"SP_EL0", REG_SP_EL0, 0x184100, SR_READ | SR_WRITE},
   863  	{"SP_EL1", REG_SP_EL1, 0x1c4100, SR_READ | SR_WRITE},
   864  	{"SPSel", REG_SPSel, 0x184200, SR_READ | SR_WRITE},
   865  	{"SPSR_abt", REG_SPSR_abt, 0x1c4320, SR_READ | SR_WRITE},
   866  	{"SPSR_EL1", REG_SPSR_EL1, 0x184000, SR_READ | SR_WRITE},
   867  	{"SPSR_fiq", REG_SPSR_fiq, 0x1c4360, SR_READ | SR_WRITE},
   868  	{"SPSR_irq", REG_SPSR_irq, 0x1c4300, SR_READ | SR_WRITE},
   869  	{"SPSR_und", REG_SPSR_und, 0x1c4340, SR_READ | SR_WRITE},
   870  	{"SSBS", REG_SSBS, 0x1b42c0, SR_READ | SR_WRITE},
   871  	{"TCO", REG_TCO, 0x1b42e0, SR_READ | SR_WRITE},
   872  	{"TCR_EL1", REG_TCR_EL1, 0x182040, SR_READ | SR_WRITE},
   873  	{"TFSR_EL1", REG_TFSR_EL1, 0x185600, SR_READ | SR_WRITE},
   874  	{"TFSRE0_EL1", REG_TFSRE0_EL1, 0x185620, SR_READ | SR_WRITE},
   875  	{"TPIDR_EL0", REG_TPIDR_EL0, 0x1bd040, SR_READ | SR_WRITE},
   876  	{"TPIDR_EL1", REG_TPIDR_EL1, 0x18d080, SR_READ | SR_WRITE},
   877  	{"TPIDRRO_EL0", REG_TPIDRRO_EL0, 0x1bd060, SR_READ | SR_WRITE},
   878  	{"TRFCR_EL1", REG_TRFCR_EL1, 0x181220, SR_READ | SR_WRITE},
   879  	{"TTBR0_EL1", REG_TTBR0_EL1, 0x182000, SR_READ | SR_WRITE},
   880  	{"TTBR1_EL1", REG_TTBR1_EL1, 0x182020, SR_READ | SR_WRITE},
   881  	{"UAO", REG_UAO, 0x184280, SR_READ | SR_WRITE},
   882  	{"VBAR_EL1", REG_VBAR_EL1, 0x18c000, SR_READ | SR_WRITE},
   883  	{"ZCR_EL1", REG_ZCR_EL1, 0x181200, SR_READ | SR_WRITE},
   884  }
   885  
   886  func SysRegEnc(r int16) (string, uint32, uint8) {
   887  	// The automatic generator guarantees that the order
   888  	// of Reg in SystemReg struct is consistent with the
   889  	// order of system register declarations
   890  	if r <= SYSREG_BEGIN || r >= SYSREG_END {
   891  		return "", 0, 0
   892  	}
   893  	v := SystemReg[r-SYSREG_BEGIN-1]
   894  	return v.Name, v.Enc, v.AccessFlags
   895  }
   896  

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